A Folded-Cascode BiCMOS Op-Amp

** Circuit Description **
* power supplies
Vdd 4 0 DC +5V
Vss 5 0 DC -5V
* differential-mode signal level
Vd 101 0 DC 0V
Rd 101 0 1
EV+ 1 100 101 0 +0.5
EV- 2 100 101 0 -0.5
* common-mode signal level
Vcm 100 0 DC 0V
* differential-pair steering control
M1 8 1 3 4      pmos_transistor L=10u W=500u
M2 9 2 3 4      pmos_transistor L=10u W=500u
M5 3 14 4 4     pmos_transistor L=6u  W=120u
* cascode stage
M3 13 12 4 4    pmos_transistor L=6u W=60u
M4 12 12 4 4    pmos_transistor L=6u W=60u
M3c 11 11 13 4  pmos_transistor L=6u W=60u
M4c 10 11 12 4  pmos_transistor L=6u W=60u

Q1c 11 7 8 5    npn_transistor
Q2c 10 7 9 5    npn_transistor
Q6  8 6 5 5     npn_transistor 3
Q7  9 6 5 5     npn_transistor 3
* biasing stage
Q8  7 7 6 5     npn_transistor
Q9  6 6 5 5     npn_transistor
M10 7 14 4 4    pmos_transistor L=6u W=30u
M11 14 14 4 4   pmos_transistor L=6u W=30u
Iref 14 5 5uA
* load capacitance
Cl 10 0 10pF
* transistor model statements
* Bipolar transistor model statements
.model npn_transistor NPN ( Bf=200 Br=2.0 VAf=125V Is=10fA Tf=0.35ns
+ Rb=200 Rc=200 Re=2 Cje=1.0pF Vje=0.70V Mje=0.33 Cjc=0.3pF Vjc=0.55V
+ Mjc=0.5 Cjs=3.0pF Vjs=0.52V Mjs=0.5 )
* 5u BNR CMOS transistor model statements
.MODEL pmos_transistor pmos ( level=2 vto=-1 nsub=2e15 tox=8.5e-8 uo=250
+ cgso=4e-10 cgdo=4e-10 cgbo=2e-10 uexp=0.03 ucrit=1e4 utra=0 vmax=3e4 rsh=75
+ cj=1.8e-4 mj=2 pb=0.7 cjsw=6e-10 mjsw=2 js=1e-6 xj=0.9u ld=0.6u )
** Analysis Requests **
.DC Vd -10mV +10mV 100uV
** Output Requests **
.PLOT DC V(10)
.probe
.end