SPICE Decks For Microelectronic Circuits, 1st Edition

INPUT FILES FOR
SPICE, First Edition

This directory contains the SPICE decks listed in the text book, "Spice for Microelectronic Circuits, 1st Edition" by Roberts and Sedra. The SPICE decks are listed according to their corresponding book figure number.

Chapter 1 Introduction To Spice

Figure 1.11: Resistive Network With Dependent Sources
Figure 1.14: Transient Response Of A 3-Stage Linear Amplifier
Figure 1.17: Investigating Initial Conditions Established By Spice
Figure 1.22: Frequency Response Behavior Of A Voltage Amplifier

Chapter 2 Operational Amplifiers

Figure 2.3 Inverting Amplifier Configuration
Figure 2.6 The Miller Integrator
Figure 2.9 The Miller/Damped Integrator Comparison
Figure 2.13 Unity-Gain Buffer
Figure 2.14 Unity-Gain Buffer
Figure 2.18 Instrumentation Amplifier
Figure 2.22 Inverting Amplifier With Gain -1
Figure 2.27 DC Transfer Characteristics Of An Inverting Amplifier With Gain -10
Figure 2.30 Investigating Op-Amp Slew-Rate Limiting
Figure 2.36 The Effect Of DC Offsets On A Miller Integrator

Chapter 3 Diodes

Figure 3.5 Spice As A Curve Tracer: Diode I-V Characteristics
Figure 3.11 A Three Diode String Voltage Regulator Circuit
Figure 3.16 Zener Diode Voltage Regulator Circuit (No Load)
Figure 3.23 Half-Wave Rectifier Circuit
Figure 3.28 Full-Wave Peak Rectifier Circuit
Figure 3.34 A Regulated Power Supply
Figure 3.38 A Diode Limiter Circuit
Figure 3.41 A DC Restorer Circuit
Figure 3.44 A Voltage Doubler Circuit

Chapter 4 Bipolar Junction Transistor (BJTs)

Figure 4.4 Verifying Transistor Circuit Design
Figure 4.6 Spice As A Curve Tracer: BJT I-V Characteristics
Figure 4.10 NPN Transistor Operated In Active Mode
Figure 4.12 PNP Transistor DC Operating Point Calculation
Figure 4.14 Multiple Transistor Circuit Bias Point Calculation
Figure 4.17 Calculating Voltage Gain Of A Transistor Amplifier
Figure 4.18 Time-Domain Waveforms Of A Transistor Amplifier
Figure 4.21 Time-Domain Waveforms For A PNP Transistor Amplifier
Figure 4.24 Investigating The Sensitivity Of the Emitter Current To Amplifier Components
Figure 4.25 Investigating Emitter Current Dependence On Temperature
Figure 4.34 Common-Emitter Amplifier Stage
Figure 4.30 Common-Emitter Amplifier Stage With Sine-Wave Input
Figure 4.32 Common-Base Amplifier Stage
Figure 4.34 Using The 2N696 As A Switch

Chapter 5 Field-effect Transistors (FETs)

Figure 5.4 Simple Enhancement-Mode MOSFET Circuit
Figure 5.6 Enhancement-Mode N-Channel MOSFET Id - Vds Characteristics
Figure 5.8 Enhancement-Mode N-Channel MOSFET Id - Vgs Characteristics
Figure 5.11 A Simple Enhancement-Mode PMOS Circuit (Rd=6k)
Figure 5.13 A Depletion-Mode PMOS Transistor Circuit
Figure 5.15 A Depletion-Mode NMOS Transistor Circuit
Figure 5.19 A Simple N-Channel JFET Circuit
Figure 5.21 A Simple P-Channel JFET Circuit
Figure 5.24 An Enhancement-Type NMOS Amplifier
Figure 5.28 An Enhancement-Mode NMOS Amplifier
Figure 5.30 Simple MOSFET Bias Network (No Feedback Mechanism)
Figure 5.31 MOSFET Bias Network With Feedback
Figure 5.33 An Enhancement-Load Amplifier Including Body Effect
Figure 5.36 A CMOS Amplifier
Figure 5.41 Computing Switch On-Resistance Of A NMOS Switch
Figure 5.43 Computing Switch On-Resistance Of A CMOS Switch
Figure 5.45 The Effect Of The Threshold Voltage On Switch Operation
Figure 5.51 A MESFET Amplifier

Chapter 6 Differential And Multistage Amplifiers

Figure 6.2 A BJT Differential Pair
Figure 6.4 A BJT Differential Pair
Figure 6.8 A BJT Differential Pair
Figure 6.10 Differential Amplifier: Asymmetric Collector Resistance
Figure 6.12 Differential Amplifier: Asymmetric Saturation Current
Figure 6.14 Wilson Current Mirror
Figure 6.19 High-Swing Cascode Current Mirror
Figure 6.22 A Simple Bipolar Current Source
Figure 6.26 A CMOS Differential Amplifier With Current Source Biasing
Figure 6.31 A MESFET Differential Amplifier
Figure 6.37 A Simple Operational Amplifier

Chapter 7 Frequency Response

Figure 7.3 Bode Plot
Figure 7.8 Frequency Response Of A JFET Amplifier
Figure 7.11 Frequency Response Of Small-Signal Model Of A FET Amplifier
Figure 7.14 A Common-Emitter Amplifier
Figure 7.15 A Cascode Amplifier
Figure 7.18 A Common-Collector Common-Emitter Cascade Stage
Figure 7.21 A Differential Amplifier
Figure 7.22 Differential Amplifier With Emitter Resistors
Figure 7.23 A Modified Differential Amplifier

Chapter 8 Feedback

Figure 8.5 Feedforward Gain Stage Of Noninverting Amplifier
Figure 8.7 Evaluating The h-Parameters Of Feedforward Gain Stage
Figure 8.10 Feedforward Circuit Of Broadband Amplifier
Figure 8.12 Open-Loop Portion Of Broadband Amplifier (Revised Output Port)
Figure 8.15 Voltage-Sampling Shunt-Mixing Voltage Amplifier Circuit (Closed-Loop)
Figure 8.17 Feedforward Portion Of Shunt-Shunt Amplifier
Figure 8.20 Feedforward Network Of Current-Sampling Shunt-Mixing Amplifier
Figure 8.24 Computing The Loop Terminating Resistance Rt
Figure 8.27 Computing The Short-Circuit Current Transfer Function
Figure 8.29 Calculating Loop Transmission Of 2nd Order Active Filter (K=1)
Figure 8.32 Closed-Loop Transient Response Of Stable Filter Circuit (K=1)
Figure 8.36 Open-Loop Amplifier Characteristics
Figure 8.39 Step Response Of A Noninverting Amplifier With A Gain Of +2 V/V
Figure 8.46 Step Response Of A Unity-Gain Amplifier Compensated With A Shunt-Capacitor

Chapter 9 Output Stages And Power Amplifiers

Figure 9.2 A Class A Output Stage
Figure 9.8 Class B Output Stage
Figure 9.14 Class AB Output Stage
Figure 9.17 Class AB Output Stage With Short Circuit Protection

Chapter 10 Analog Integrated Circuits

Figure 10.2 The 741 Op-Amp
Figure 10.6 The 741 Op-Amp
Figure 10.9 The 741 Op-Amp
Figure 10.13 A CMOS Operational Amplifier (5um CMOS Models)
Figure 10.17 A Folded-Cascode CMOS Op-Amp
Figure 10.18 A Folded-Cascode BiCMOS Op-Amp
Figure 10.22 R-2R Ladder D/A Converter
Figure 10.26 A 3-Bit A/D Flash Converter

Chapter 11 Filters And Tuned Amplifiers

Figure 11.2 9th-Order Butterworth Filter Function
Figure 11.4 5th-Order Chebyshev Filter Function
Figure 11.7 5th-Order Chebyshev Filter Circuit (Fig. 11.6)
Figure 11.11 Second-Order Bandpass Filter Circuit (Nonideal Op-Amp)
Figure 11.16 A Second-Order HP SAB Circuit (nonideal op-amp)
Figure 11.19 A Bandpass Tuned Amplifier

Chapter 12 Signal Generators And Waveform-Shaping Circuits

Figure 12.1 741 Subcircuit
Figure 12.3 A Wien-Bridge Oscillator With Amplitude Stabilization
Figure 12.6 The Active-Filter Tuned Oscillator
Figure 12.9 A Pierce Crystal Oscillator
Figure 12.12 The Bistable Circuit
Figure 12.14 An Astable Multivibrator: Square-Wave Generator
Figure 12.16 The Monostable Multivibrator
Figure 12.19 A 3-Segment Sine-Wave Shaper
Figure 12.22 Precision Rectifier Circuit
Figure 12.24 A Buffered Precision Peak Detector
Figure 12.26 A Precision Clamping Circuit

Chapter 13 MOS Digital Circuits

Figure 13.2 An Enhancement-Load Inverter
Figure 13.6 A Cascade Of Enhancement-Load Inverters (dynamic effects included)
Figure 13.11 A Depletion-Load Inverter
Figure 13.14 The CMOS Inverter
Figure 13.18 A Cascade Of CMOS Inverters (dynamic effects included)
Figure 13.22 A Two-Input CMOS NOR Gate
Figure 13.25 A Set/Reset Flip-Flop
Figure 13.29 A DCFL GaAs Gate

Chapter 14 Bipolar Digital Circuits

Figure 14.2 Voltage Characteristics Of A Two-Input TTL NAND Gate (Vb=logic 1)
Figure 14.7 Fanout Behavior Of A NAND Gate
Figure 14.11 Two-Input ECL OR Gate With Complementary NOR Output
Figure 14.17 A Cascade Of Two ECL Gates Interconnected By A Lossless Transmission Line
Figure 14.21 A BiCMOS Two-Input Nand Gate

Comments & Questions: Prof. Roberts.
Date: April 14, 1995.

INPUT FILES FOR SPICE, First Edition