Version 4 SHEET 1 1036 872 WIRE 384 48 208 48 WIRE 608 48 464 48 WIRE 208 160 208 48 WIRE 400 160 208 160 WIRE 608 160 608 48 WIRE 608 160 464 160 WIRE -64 272 -128 272 WIRE 0 272 -64 272 WIRE 208 272 208 160 WIRE 208 272 80 272 WIRE 272 272 208 272 WIRE 416 272 272 272 WIRE 608 288 608 160 WIRE 608 288 480 288 WIRE 784 288 608 288 WIRE 416 304 384 304 WIRE -128 336 -128 272 WIRE 384 336 384 304 WIRE -128 480 -128 416 FLAG -128 480 0 FLAG 784 288 OUT FLAG -64 272 IN FLAG 272 272 INV- FLAG 384 336 0 SYMBOL res 96 256 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1k SYMBOL voltage -128 320 R0 SYMATTR InstName V1 SYMATTR Value 0V SYMBOL Opamps/opamp 448 224 R0 WINDOW 3 3 89 Left 2 WINDOW 39 0 54 Left 2 WINDOW 40 0 76 Left 2 SYMATTR Value dc_imperfection_opamp SYMATTR SpiceLine "" SYMATTR SpiceLine2 "" SYMATTR InstName U1 SYMBOL cap 464 144 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 10µF SYMBOL res 480 32 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 100k TEXT 40 456 Left 2 !.TRAN 500ms 10s 0s 500ms UIC TEXT 560 392 Left 2 !.subckt dc_imperfection_opamp 3 2 1\n* connections: | | |\n* -ve input | |\n* +ve input |\n* output\nIB1 4 0 DC 200nA\nIB2 3 0 DC 200nA\nIOS/2 3 4 DC 5nA\nVOS 4 2 DC 5mV\nXdc_free_opamp 3 4 1 VCVS_opamp\n.ends dc_opamp TEXT 568 680 Left 2 !.subckt VCVS_opamp 3 2 1\n* connections: | | |\n* -ve input | |\n* +ve input |\n* output\nEoutput 1 0 2 3 1e6\n.ends VCVS_opamp