(A.6)
Delta-sigma modulation is becoming more wide-spread in circuit applications, whether it be for data conversion or signal processing, because the circuits used for its implementation are mostly digital and tolerant of low-precision analog circuits. This is advantageous today as high-precision data conversion circuits can now be integrated alongside complex digital circuits using fine-line VLSI digital processes. As delta-sigma modulation also plays an important role in the operation of the oscillator circuit of this text, this appendix will outline its basic operation.
The simplest, or first-order, digital single-bit delta-sigma modulator is shown in Fig. A.1. It consists of a data register, denoted by the symbol z-1, and a summer stage in an internal feedback loop (which together form a digital integrator circuit) plus a quantizer block, another summer stage, and a digital-to-digital conversion stage. Except for the single-bit output of the quantizer, all data paths are M-bits wide. We shall denote the multi-bit wide data paths with a thick line and the single-bit output with a thin line. From a signal processing point-of-view, the data register simply delays the input data by one clock cycle, and is commonly denoted by its z-transform input-output transfer function: z-1. The quantizer decides whether its input is larger than some threshold value, usually the midway point in the number system used, and specifies a one if the input is larger than this threshold value, otherwise a zero is specified. The digital-to-digital stage performs a code conversion so that the signal that feeds back to the input of the delta-sigma modulator is in the same number system as the input signal and represents either the largest or smallest signal in that particular number system. For the block diagram shown in Fig. A.1, we see that the single-bit output signal of one is converted to a value of (2M - 1) before it is fed back to the modulator input. Conversely, a zero output is converted to an M-bit zero representation. In this particular case, we have chosen an unsigned binary number system. One is free to choose any type of number system one wishes, such as signed-integer or two's complement.
Let us consider the operation of this modulator subject to a sinusoidal input having a very large peak-to-peak amplitude. On simulating the time behavior of this modulator, an output similar to the one shown in Fig. A.2 results. With the input signal superimposed on the output signal, we see that the output signal toggles between the zero and one states in such a way that the input signal is encoded into the density of the one's in the output signal. In other words, when the input signal is very near the full scale value, the output is in the high state for many clock cycles. Conversely, when the input is near the other extreme, the output is in the zero state for many clock cycles. In both cases, the local average of the modulator output tracks the analog input. When the input is near the midrange, the value of the modulator output varies rapidly between the low and high states in almost equal proportion. This type of encoding is referred to as Pulse Density Modulation (PDM). By carefully averaging the output over many clock cycles, the input signal can be recovered, either as another multi-bit digital signal or as an analog signal.
To appreciate this fact, consider that the delta-sigma modulator is approximating the M-bit digital input signal u(n) by a single-bit stream y(n) and that the difference between these two signals is the error in the approximation. In mathematical terms, we can state, without any time reference, that the input and output signals are related according to
y = u + error. (A.1)
Since the quantizer is the only nonlinear block present, the error made by the modulator is due to the quantizer alone. Let us denote this quantization error as e(n). Note that the error in Eqn. (A.1) is the error at the output of the modulator, while e(n) is the error made by the quantizer which is internal to the delta-sigma modulator. By re-arranging the block diagram shown in Fig. A.1 to that shown in Fig. A.3, we see more directly how the quantization error e(n) is fed back to combine with the input signal u(n). The block diagram of Fig. A.3 is the result of moving the summer internal to the discrete integrator circuit into the feedback path of the delta-sigma modulator. Such a block diagram manipulation is valid because addition is associative. Now, following this error signal e(n), it combines with the input signal producing the difference u(n) - e(n). This signal then appears at the input of the quantizer one clock period later. If the quantizer input is larger than its threshold value, a one is produced at its output, otherwise a zero is specified. The error made by the quantizer, i.e., the difference between the input and output of the quantizer, can then be stated as:
e(n) = y(n) - [ u(n-1) - e(n-1) ]. (A.2)
It is assumed here that the input and output of the digital-to-digital (D/D) converter are the same signals, as the D/D block simply converts a signal in one number system to the same signal in another number system. Eqn. (A.2) can be re-arranged to obtain an expression for the output in terms of the input and the error terms generated by the quantizer, i.e.,
y(n) = u(n-1) + [ e(n) - e(n-1) ]. (A.3)
This is the fundamental equation for the modulator as it very clearly illustrates that the error made by the modulator depends only on the difference between two adjacent quantization errors and not on any single error term. If we operate the modulator such that adjacent samples of a bandlimited input signal are very similar (in practice, one can achieve this by restricting the bandwidth of the input signal to much less than the sampling frequency), then subsequent quantization errors will also be similar over this same bandwidth, thus their difference will be small. Another way of viewing this is that the modulator is estimating the error that will be made at the next sampling instant based on the past error and correcting its output by subtracting off this error estimate from the input before the new output is created.
It is interesting to note at this time that if we feed back to the input an error signal that depends on more than one past quantization error term, i.e., e(n-1), e(n-2), ... e(n-N), intuitively one would expect that a better estimate of the sample error could be made, as fluctuations in the input signal could be better modeled. For the second-order delta-sigma modulator used throughout this text, this is precisely what is done. For the modulator shown in Fig. A.4, the expression that relates the output signal in terms of the input and quantizer error is as follows:
y(n) = u(n-1) + [ e(n) - 2e(n-1) +e(n-2) ]. (A.4)
Here we see that the error in the output approximation depends on two previous quantization errors instead of one as in the previous first-order case.
In order to quantify more precisely the nature of the error signal in relation to the input and output signals, it is best to look at the operation of the delta-sigma modulator in the frequency domain. If we write the z-transform of Eqn. (A.3) above, we get
Y(z) = z-1U(z) + (1-z-1 ) E(z), (A.4)
where Y(z), U(z) and E(z) are the z-transforms of discrete signals y(n), u(n) and e(n), respectively. On account of the nonlinear operation of the delta-sigma modulator, the z-transform for e(n) may not always exist. To simplify the analysis, we shall assume that e(n) has certain convenient properties, such as a white spectrum, where E(z) does exist. As a matter of convenience, we often refer to the error made by the quantizer as noise. This is meant to indicate that its output is random, but its frequency spectrum is known. From Eqn (A.4) we see that the input signal U(z) is multiplied by z-1 while the quantization noise E(z) is weighted by (1-z-1). These two terms are referred to as the Signal Transfer Function (STF) and Noise Transfer Function (NTF), respectively. These two transfer functions indicate the contribution made by the input and quantization noise terms to the output signal. To visualize these two transfer functions, we plot the magnitude of these two terms as a function of frequency over the Nyquist interval (i.e., 0 < f < fs/2 ) of the modulator in Fig. A.5. This is achieved by substituting z = e j2[[pi]] fT and evaluating each transfer function at individual frequency points between DC and fs/2. Here we see that the magnitude of the STF is unity over the entire Nyquist interval of the modulator. This suggests that the attributes of the input signal remain unchanged by delta-sigma modulation. In contrast, the magnitude of the NTF is essentially zero at low frequencies rising to a value of two as it approaches fs/2. With the quantizer error assumed to have a uniform spectrum across the Nyquist interval, i.e., white, then we can expect at very low frequencies very little quantization noise will affect the output. In contrast, at the other end of the Nyquist interval, e.g., at high frequencies, we see that a larger proportion of quantization noise will affect the output signal. Due to the way the modulator alters the effect of quantization noise on its output, delta-sigma modulators are commonly referred to as noise-shaping modulators.
Figure A.6 illustrates how the input and quantization noise spectra are altered by the delta-sigma modulation process. In part (a) we depict the input signal as a single tone located at frequency fo in the Nyquist interval having an amplitude A and a power PS of W. Further, we depict the quantizer error as having a flat power spectral density (PSD) of W/Hz, where [[Delta]] denotes the step size of the quantizer traversing from a low logic level to a high logic level. This quantification is reasonable in practice and is based on the assumption that individual errors are uncorrelated and that the probability distribution of these errors are uniformly distributed over the range defined by [[Delta]]. Figure A.6(b) illustrates the magnitude of both the STF and NTF on the same frequency axis as the spectra plots shown in Fig. A.6(a). Figure A.6(c) depicts the effect of each signal on the output. Here the output PSD is simply a linear combination of the input signal and quantization noise PSDs weighted by the squared-magnitude of the STF and NTF, respectively, according to the following:
SY (f) = |STF|2 SU(f) + |NTF|2 SE (f). (A.5)
It is customary to denote the PSD of a signal by the symbol S followed by a subscript denoting its source. Finally, if we bandlimit the output to a much lower frequency than half the sampling frequency of fs/2, say, to some frequency much smaller than this which we shall denote as B, then the spectra that remains at the output is that shown in Fig. A.6(d). Clearly, the bandlimiting operation removed much of the quantization noise, leaving a small residual with the input signal. It is common to refer to the ratio of fs/2 to B as the oversampling ratio (OSR). Clearly, the larger the OSR, the smaller the residue noise. It is rather straightforward to quantify this residual noise power by simply integrating the power spectral density of the quantization noise component at the output over a bandwidth of B. On doing so, we would write the output noise power PQ as
(A.6)
In the case of a first-order delta-sigma modulator, the magnitude of NTF has the form 2sin(2[[pi]] f T / 2) as it comes directly from the expression | 1-z-1 | when z is replaced by ej2[[pi]]fT. Substituting this expression into Eqn. (A.6), we find
PQ = [[Delta]]2 [[pi]]2 ()3 . (A.7)
If we consider the situation where the output PDM bit-stream has encoded into it the largest sinusoidal signal possible, then we can reason that its peak-to-peak amplitude will be limited by the step size of the quantizer, i.e., A = . Thus, the maximum or peak signal-to-quantization-noise ratio (SNR) possible at the output of the delta-sigma modulator is
SNR = = -3 (A.8)
or when written in terms of the oversampling ratio,
SNR = 3 . (A.9)
Equation (A.9) can also be expressed in dB's as follows,
SNR|dB = 9 log2 OSR - 3.4 . (A.10)
We immediately recognize from Eqn. (A.10) that doubling the OSR will immediately increase the SNR by 9 dB.
In the case of a second-order delta-sigma modulator, one can follow exactly the same steps as above and arrive at an expression for the peak SNR. This we found to be
SNR|dB = 15 log2 OSR - 2 . (A.11)
In this situation we see that a doubling of the OSR will increase the peak SNR by 15 dB.
In either the first or second-order case, to achieve a high peak SNR, a large oversampling ratio is necessary; obviously less for the second-order case. Thus, in principle, delta-sigma modulation provides the means to trade-off signal processing speed for signal resolution.
In the above analysis, no mention of the type of filtering that can be used to recover the input signal from the PDM output signal was provided. One can use an analog continuous-time filtering scheme and recover an analog equivalent representation of the input digital signal, or use a digital filter and recover an almost exact replica of the original digital input signal. For the oscillator circuit of this text, we are relying on an analog filter of order at least equal to the order of the delta-sigma modulator to convert the digitally created signal to analog form. Our experience with this approach suggests that it is a good one.