SPICE Decks For Microelectronic Circuits, 2nd Edition

INPUT FILES FOR
SPICE, Second Edition

This directory contains the SPICE decks listed in the text book, "SPICE", 2nd Edition by Roberts and Sedra. The SPICE decks are listed according to the way they appear in the book under their corresponding book figure number.

Chapter 1 Introduction To Spice

Figure 1.11: Resistive Network With Dependent Sources
Figure 1.14: Transient Response Of A 3-Stage Linear Amplifier
Figure 1.17: Investigating Initial Conditions Established By Spice
Figure 1.22: Frequency Response Behavior Of A Voltage Amplifier

Chapter 2 Operational Amplifiers

Figure 2.3: Inverting Amplifier Configuration
Figure 2.6:The Miller Integrator
Figure 2.9: The Miller/Damped Integrator Comparison
Figure 2.13: Unity-Gain Buffer
Figure 2.14: Unity-Gain Buffer
Figure 2.18: Instrumentation Amplifier
Figure 2.22: Inverting Amplifier With Gain -1
Figure 2.27: DC Transfer Characteristics Of An Inverting Amplifier With Gain -10
Figure 2.30: Investigating Op-Amp Slew-Rate Limiting

Chapter 3 Diodes

Figure 3.5 : Spice As A Curve Tracer: Diode I-V Characteristics
Figure 3.12: Zener Diode Voltage Regulator Circuit (No Load)
Figure 3.19: Half-Wave Rectifier Circuit
Figure 3.24: A Diode Limiter Circuit
Figure 3.27: A DC Restorer Circuit
Figure 3.30:A Voltage Doubler Circuit

Chapter 4 Bipolar Junction Transistor (BJTs)

Figure 4.4: Verifying Transistor Circuit Design
Figure 4.6: Spice As A Curve Tracer: BJT I-V Characteristics
Figure 4.10:NPN Transistor Operated In Active Mode
Figure 4.12:PNP Transistor DC Operating Point Calculation
Figure 4.15:Calculating Voltage Gain Of A Transistor Amplifier
Figure 4.17: Investigating The Sensitivity Of the Emitter Current To Amplifier Components
Figure 4.18: Investigating Emitter Current Dependence On Temperature
Figure 4.22: Common-Emitter Amplifier Stage
Figure 4.23: Common-Emitter Amplifier Stage With Sine-Wave Input

Chapter 5 Field-effect Transistors (FETs)

Figure 5.4: Simple Enhancement-Mode MOSFET Circuit
Figure 5.6: Enhancement-Mode N-Channel MOSFET Id - Vds Characteristics
Figure 5.8: Enhancement-Mode N-Channel MOSFET Id - Vgs Characteristics
Figure 5.11: A Simple Enhancement-Mode PMOS Circuit (Rd=6k)
Figure 5.13: A Depletion-Mode PMOS Transistor Circuit
Figure 5.15: A Depletion-Mode NMOS Transistor Circuit
Figure 5.19: A Simple N-Channel JFET Circuit
Figure 5.21: A Simple P-Channel JFET Circuit
Figure 5.24: An Enhancement-Type NMOS Amplifier
Figure 5.28: An Enhancement-Mode NMOS Amplifier
Figure 5.30: Simple MOSFET Bias Network (No Feedback Mechanism)
Figure 5.31: MOSFET Bias Network With Feedback
Figure 5.33: An Enhancement-Load Amplifier Including Body Effect
Figure 5.36: A CMOS Amplifier
Figure 5.41: Computing Switch On-Resistance Of A NMOS Switch
Figure 5.43: Computing Switch On-Resistance Of A CMOS Switch
Figure 5.45: The Effect Of The Threshold Voltage On Switch Operation
Figure 5.51: A MESFET Amplifier

Chapter 6 Differential And Multistage Amplifiers

Figure 6.2: A BJT Differential Pair
Figure 6.4: A BJT Differential Pair
Figure 6.8: A BJT Differential Pair
Figure 6.10: Differential Amplifier: Asymmetric Collector Resistance
Figure 6.12: Differential Amplifier: Asymmetric Saturation Current
Figure 6.14: Wilson Current Mirror
Figure 6.18: A Simple Operational Amplifier

Chapter 7 Frequency Response

Figure 7.3: Bode Plot
Figure 7.8: Frequency Response Of A JFET Amplifier
Figure 7.11: Frequency Response Of Small-Signal Model Of A FET Amplifier
Figure 7.12: Cascode Amplifier
Figure 7.15: A Common-Collector Common-Emitter Cascade Stage

Chapter 8 Feedback

Figure 8.4: Computing The Loop Terminating Resistance Rt
Figure 8.7: Computing The Short-Circuit Current Transfer Function
Figure 8.9: Calculating Loop Transmission Of 2nd Order Active Filter (K=1)
Figure 8.12: Closed-Loop Transient Response Of Stable Filter Circuit (K=1)
Figure 8.16: Open-Loop Amplifier Characteristics
Figure 8.19: Step Response Of A Noninverting Amplifier With A Gain Of +2 V/V
Figure 8.26: Step Response Of A Unity-Gain Amplifier Compensated With A Shunt-Capacitor

Chapter 9 Output Stages And Power Amplifiers

Figure 9.2: A Class A Output Stage
Figure 9.7: Class B Output Stage

Chapter 10 Analog Integrated Circuits

Figure 10.2: The 741 Op-Amp
Figure 10.6: The 741 Op-Amp
Figure 10.9: The 741 Op-Amp
Figure 10.13: A CMOS Operational Amplifier (5um CMOS Models)

Chapter 11 Filters And Tuned Amplifiers

Figure 11.2: 9th-Order Butterworth Filter Function
Figure 11.4: 5th-Order Chebyshev Filter Function
Figure 11.7: 5th-Order Chebyshev Filter Circuit (Fig. 11.6)
Figure 11.11: Second-Order Bandpass Filter Circuit (Nonideal Op-Amp)
Figure 11.16: A Bandpass Tuned Amplifier

Chapter 12 Signal Generators And Waveform-Shaping Circuits

Figure 12.1: 741 Subcircuit
Figure 12.3: A Wien-Bridge Oscillator With Amplitude Stabilization
Figure 12.6: The Active-Filter Tuned Oscillator
Figure 12.9: The Bistable Circuit
Figure 12.11: An Astable Multivibrator: Square-Wave Generator
Figure 12.13: The Monostable Multivibrator
Figure 12.16: Precision Rectifier Circuit
Figure 12.18: A Buffered Precision Peak Detector
Figure 12.20: A Precision Clamping Circuit

Chapter 13 MOS Digital Circuits

Figure 13.2: An Enhancement-Load Inverter
Figure 13.6: A Cascade Of Enhancement-Load Inverters (dynamic effects included)
Figure 13.11: A Depletion-Load Inverter
Figure 13.14: The CMOS Inverter
Figure 13.18: A Cascade Of CMOS Inverters (dynamic effects included)
Figure 13.22: A DCFL GaAs Gate

Chapter 14 Bipolar Digital Circuits

Figure 14.2 :Voltage Characteristics Of A Two-Input TTL NAND Gate (Vb=logic 1)
Figure 14.7: Fanout Behavior Of A NAND Gate
Figure 14.11: Two-Input ECL OR Gate With Complementary NOR Output
Figure 14.17: A Cascade Of Two ECL Gates Interconnected By A Lossless Transmission Line
Figure 14.21: A BiCMOS Two-Input Nand Gate

Comments & Questions: Prof. Roberts.
Date: Oct 4, 1996.

INPUT FILES FOR SPICE, Second Edition